Chip
NVIDIA A100
NVIDIA's A100 is a data-center GPU, the first built on the Ampere architecture. Announced on 14 May 2020, it introduced third-generation Tensor Cores, the TF32 format and Multi-Instance GPU, and became a standard building block for training large language models.
Era Large models
- Architecture
- Ampere
- Type
- GPU
- Process (nm)
- 7
- Memory (GB)
- 80
- Memory type
- HBM2e
- Memory bandwidth (GB/s)
- 2039
- FP16/BF16 (TFLOPS)
- 312
- Power (W)
- 400
- Transistors (billion)
- 54.2
- Release date
- Developer
- NVIDIA
What it is
The A100 is a data-center GPU from NVIDIA and the first GPU built on the company's Ampere architecture. It was announced on 14 May 2020 at GTC 2020, and NVIDIA said at the time that the chip was already in full production and shipping. The headline claim was up to 20 times the AI performance of its predecessor[1].
The chip
The processor at its center is the GA100, which packs 54.2 billion transistors onto an 826 mm² die manufactured on TSMC's 7 nm N7 process. NVIDIA described it as the world's largest 7-nanometer processor[2]. A large die like this is a manufacturing gamble as much as an engineering one: the bigger the chip, the fewer good ones come out of each wafer, which is why announcing volume production on day one mattered to the launch story.
Tensor Cores and number formats
The third-generation Tensor Cores — dedicated matrix-multiply units inside the GPU — added several number formats. TF32 speeds up work that was written for ordinary 32-bit floating point without requiring code changes, and the hardware also supports BF16 and FP64. The published peak dense figures are 312 TFLOPS for FP16/BF16 on the Tensor Cores, 156 TFLOPS for TF32, and 19.5 TFLOPS for FP64 Tensor Core work[2]. The logic behind the mixed formats is general to this kind of hardware: representing numbers with fewer bits lets the chip move more of them through the same silicon per second, so a format that keeps enough range for neural-network weights buys throughput.
Sparsity
A second source of throughput is fine-grained structured sparsity. Many trained networks end up with weights that are zero, and the Tensor Cores can skip those zeros rather than doing arithmetic on them, which doubles throughput in the supported pattern. That is where the sparse peak numbers come from: 624 TFLOPS at FP16 and 1,248 TOPS at INT8[2].
Splitting one GPU into seven
Multi-Instance GPU, or MIG, lets a single A100 be partitioned into as many as seven isolated GPU instances[2]. The point is utilization: a large accelerator is wasteful for small jobs, and isolated instances let several smaller workloads share one card without interfering with each other.
Memory
The original A100 carried 40 GB of HBM2 memory running at 1,555 GB/s, alongside a 40 MB L2 cache. A later version, the A100 80GB in the SXM form factor, moved to HBM2e at 2,039 GB/s, with a maximum thermal design power of 400 W[3].
Systems and cloud availability
NVIDIA does not sell only chips. Announced the same day was the DGX A100 system, which contains eight A100s[1]. Cloud providers lined up as well: Alibaba Cloud, AWS, Baidu Cloud, Google Cloud, Microsoft Azure, Oracle and Tencent Cloud all planned A100 services[1]. Microsoft said it would train "dramatically bigger AI models using thousands of" A100s in Azure[1].
Where it sits in the story of large models
The A100 became one of the machines on which large language models were actually trained, and papers from that work record what it looked like in practice. Meta's LLaMA paper, from February 2023, reports that training the 65B-parameter model processed about 380 tokens per second per GPU across 2,048 A100 80GB GPUs, so that 1.4 trillion tokens took about 21 days; the team estimated that developing the models used 2,048 A100-80GB GPUs for about five months[4]. The Llama 2 paper, from July 2023, says pre-training ran on Meta's Research SuperCluster and on internal production clusters, both using NVIDIA A100s, and took 3.3 million GPU hours on A100-80GB hardware, which has a thermal design power of 350–400 W[5].
Those numbers describe more than a fast part. They show the unit in which frontier training was budgeted at the time — GPU count, tokens per second, GPU hours — and they explain why a chip's memory capacity and bandwidth matter as much as its arithmetic peak: the model has to be fed.
CapabilitiesLarge language models
TechniquesFoundation models
Ecosystem & regionOpen sourceCloudHardware & compute
Version history
7-
2016
-
Apr 5, 2016
NVIDIA Tesla P100
The Tesla P100, announced by NVIDIA in April 2016, was the first data-center GPU on the Pascal architecture, and the first to combine stacked HBM2 memory, half-precision math aimed at deep learning and the NVLink interconnect.
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Apr 5, 2016
NVIDIA Tesla P100
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2017
-
May 10, 2017
NVIDIA Tesla V100
NVIDIA's first data-center GPU built on its Volta architecture, announced in May 2017. It added Tensor Cores, dedicated matrix-multiply units; OpenAI later trained its GPT-3 models on V100s.
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May 10, 2017
NVIDIA Tesla V100
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2020
-
May 14, 2020
NVIDIA A100 · This page
NVIDIA's A100 is a data-center GPU, the first built on the Ampere architecture. Announced on 14 May 2020, it introduced third-generation Tensor Cores, the TF32 format and Multi-Instance GPU, and became a standard building block for training large language models.
-
May 14, 2020
NVIDIA A100 · This page
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2022
-
Mar 22, 2022
NVIDIA H100
The NVIDIA H100 is the first data-center GPU built on NVIDIA's Hopper architecture, announced in March 2022 with 80 billion transistors, HBM3 memory, FP8 Tensor Cores and a Transformer Engine aimed at large language models.
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Mar 22, 2022
NVIDIA H100
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2023
-
Nov 13, 2023
NVIDIA H200 Tensor Core GPU
NVIDIA's H200, announced in November 2023, is a data center GPU that was the first to use HBM3e memory, offering 141 GB at 4.8 TB/s — nearly double the A100's capacity — and roughly double the H100's inference speed on Llama 2 70B.
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Nov 13, 2023
NVIDIA H200 Tensor Core GPU
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2024
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Mar 18, 2024
NVIDIA B200 (Blackwell)
NVIDIA's data-center GPU for the Blackwell generation, announced in March 2024 as the successor to Hopper, built from two joined dies and paired with NVLink and FP4 support for large-scale AI training and inference.
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Mar 18, 2024
NVIDIA B200 (Blackwell)
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2026
-
Jan 2026
NVIDIA Rubin
NVIDIA Rubin is NVIDIA’s six-chip AI platform and the successor to Blackwell, announced at CES 2026. It targets lower-cost AI token generation, with partner products and cloud instances scheduled for 2026.
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Jan 2026
NVIDIA Rubin
20221
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PolicyUS imposes export controls on advanced computing chips to China
On 7 October 2022 the US Bureau of Industry and Security issued two rules restricting China's access to advanced computing chips, supercomputer development and advanced chip manufacturing, setting thresholds that later shaped how Nvidia sold chips in China.
20201
-
ReleaseNVIDIA launches the A100 GPU
On 14 May 2020 NVIDIA announced the A100, its first GPU built on the Ampere architecture, claiming up to 20 times the AI performance of its predecessors. It shipped in full production alongside new systems, cloud partners and supercomputer customers.
Developed by1
Succeeded by1
Successor of1
Uses1
Notes and sources
- NVIDIA's New Ampere Data Center GPU in Full Productionhttps://nvidianews.nvidia.com/news/nvidias-new-ampere-data-center-gpu-in-full-production
- NVIDIA A100 Tensor Core GPU Architecture (whitepaper)https://images.nvidia.com/aem-dam/en-zz/Solutions/data-center/nvidia-ampere-architecture-whitepaper.pdf
- NVIDIA A100 Tensor Core GPU datasheethttps://www.nvidia.com/content/dam/en-zz/Solutions/Data-Center/a100/pdf/nvidia-a100-datasheet-us-nvidia-1758950-r4-web.pdf
- LLaMA: Open and Efficient Foundation Language Modelshttps://arxiv.org/abs/2302.13971
- Llama 2: Open Foundation and Fine-Tuned Chat Modelshttps://arxiv.org/abs/2307.09288
Cite this page: NVIDIA A100. TellWorld, https://www.tellworld.net/compute/nvidia-a100. Updated 2026-11-08