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The chips that train and run AI models: GPUs, TPUs and other accelerators, and which models were trained on them.
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2026
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Jan 26, 2026
Microsoft Maia 200
Microsoft's Maia 200 is an inference accelerator introduced on 26 January 2026, built on TSMC's 3-nanometer process with 216 GB of HBM3e memory and more than 10 petaflops at FP4, aimed at serving models such as OpenAI's GPT-5.2.
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Jan 2026
NVIDIA Rubin
NVIDIA Rubin is NVIDIA’s six-chip AI platform and the successor to Blackwell, announced at CES 2026. It targets lower-cost AI token generation, with partner products and cloud instances scheduled for 2026.
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2026
AMD Instinct MI400
The AMD Instinct MI400 is AMD's next-generation data-center GPU for AI, expected in 2026 with 432 GB of HBM4 memory, and designed to be deployed inside AMD's Helios rack-scale system.
2025
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Dec 2, 2025
AWS Trainium3
AWS Trainium3 is AWS's first 3-nanometer AI chip, delivering 2.52 petaflops of FP8 compute per chip and scaling to 144 chips in a Trn3 UltraServer, available through Amazon EC2 from December 2025.[^1][^2]
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Jun 12, 2025
AMD Instinct MI355X
AMD's data-center GPU for AI, introduced in June 2025 on the CDNA 4 architecture, with 288 GB of HBM3E memory and very high low-precision throughput aimed at generative AI inference, positioned against Nvidia's Blackwell generation.
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Jun 12, 2025
AMD Instinct MI350X
AMD Instinct MI350X is a data-center GPU in AMD's MI350 series, built on the CDNA 4 architecture with up to 288 GB of HBM3E memory, up to 8 TB/s of bandwidth and a 1,000 W board power.
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Mar 18, 2025
NVIDIA GB300 NVL72
A rack-scale NVIDIA system announced in March 2025 that links 72 Blackwell Ultra GPUs and 36 Grace CPUs into one unit, rated at 1.5 times the AI performance of GB200 NVL72.
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Jan 30, 2025
Intel Falcon Shores
Falcon Shores is an Intel chip that the company said in January 2025 it would use only as an internal test chip, never bringing it to market, while pointing to Jaguar Shores as its route into rack-scale AI data-centre systems.
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2025
Google TPU7x (Ironwood)
TPU7x (Ironwood) is Google's seventh-generation TPU: 192 GB of high-bandwidth memory per chip, FP8 matrix units, 9,216 chips per pod, and a programming model that exposes two devices per chip.
2024
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Dec 5, 2024
AWS Trainium2
AWS Trainium2 is Amazon Web Services' second-generation machine-learning chip, sold through 16-chip EC2 Trn2 instances and 64-chip Trn2 UltraServers, and pitched by AWS as offering better price performance than comparable GPU instances.
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Dec 2024
Google TPU v6e (Trillium)
Google TPU v6e, also called Trillium, is a Google Cloud AI accelerator whose published specifications cover per-chip BF16 and FP8 compute, high-bandwidth HBM, and pod-scale interconnects for large training jobs.
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Oct 10, 2024
AMD Instinct MI325X
A data-center GPU announced by AMD on 10 October 2024, built on third-generation CDNA with 256 GB of HBM3E memory at 6 TB/s and aimed at models with a trillion parameters.
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Apr 10, 2024
Meta MTIA v2
Meta's second-generation in-house AI chip, published on 10 April 2024, built on TSMC's 5-nanometer process and aimed at the ranking and recommendation models Meta runs in its own data centers.
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Mar 18, 2024
NVIDIA GB200 NVL72
NVIDIA's GB200 NVL72 is a liquid-cooled rack that links 72 Blackwell GPUs and 36 Grace CPUs into a single NVLink domain aimed at trillion-parameter AI. Announced at GTC in March 2024, it is the building block of NVIDIA's Blackwell-generation DGX SuperPOD.
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Mar 18, 2024
NVIDIA B200 (Blackwell)
NVIDIA's data-center GPU for the Blackwell generation, announced in March 2024 as the successor to Hopper, built from two joined dies and paired with NVLink and FP4 support for large-scale AI training and inference.
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Mar 13, 2024
Cerebras Wafer-Scale Engine 3
Cerebras's third-generation wafer-scale AI chip, announced in March 2024: 4 trillion transistors on one 46,225-square-millimetre piece of silicon, built to keep very large models in a single memory space.
2023
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Dec 2023
Google TPU v5p
Google TPU v5p is a 2023 TPU generation with 459 teraflops of peak BF16 and FP8 compute per chip, 95 GiB of HBM, and 8,960 chips per pod.
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Nov 15, 2023
Microsoft Azure Maia 100
Azure Maia 100 is Microsoft's first custom AI chip, announced in November 2023 and built to train and run large language models inside its own Azure data centres rather than being sold.
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Nov 13, 2023
NVIDIA H200 Tensor Core GPU
NVIDIA's H200, announced in November 2023, is a data center GPU that was the first to use HBM3e memory, offering 141 GB at 4.8 TB/s — nearly double the A100's capacity — and roughly double the H100's inference speed on Llama 2 70B.
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May 2023
Meta MTIA v1
MTIA v1 is Meta's first-generation in-house AI inference accelerator, built on TSMC's 7 nm process with 128 MB of on-chip memory and designed for deep learning recommendation models.
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2023
Huawei Ascend 910B
Huawei's Ascend 910B is a 2023 volume-production AI chip rated at 320 TFLOPS of FP16, with 32 GB of HBM2e memory, 1.6 TB/s of bandwidth and a 310 W envelope on a 7-nanometer domestic process.
2022
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Mar 22, 2022
NVIDIA DGX H100
NVIDIA's fourth-generation DGX system, announced in March 2022, packs eight H100 GPUs linked by NVLink plus BlueField-3 networking, and is rated at 32 petaflops of FP8 AI performance for enterprise AI infrastructure.
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Mar 22, 2022
NVIDIA H100
The NVIDIA H100 is the first data-center GPU built on NVIDIA's Hopper architecture, announced in March 2022 with 80 billion transistors, HBM3 memory, FP8 Tensor Cores and a Transformer Engine aimed at large language models.
2020
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May 14, 2020
NVIDIA DGX A100
NVIDIA's third-generation DGX system, unveiled on 14 May 2020: eight A100 GPUs, 320 GB of GPU memory, five petaflops of rated AI performance, and the ability to split into as many as 56 instances.
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May 14, 2020
NVIDIA A100
NVIDIA's A100 is a data-center GPU, the first built on the Ampere architecture. Announced on 14 May 2020, it introduced third-generation Tensor Cores, the TF32 format and Multi-Instance GPU, and became a standard building block for training large language models.
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2020
Google TPU v4
Google's TPU v4 is a machine-learning chip and supercomputer deployed since 2020, built into 4,096-chip pods with optically reconfigurable networking; PaLM and Gemini models were trained on it.
2018
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Mar 27, 2018
NVIDIA DGX-2
NVIDIA's DGX-2, announced in March 2018, packed 16 Tesla V100 GPUs and a new NVSwitch interconnect into one server that NVIDIA described as the first to reach two petaflops for deep learning.
2017
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May 10, 2017
NVIDIA Tesla V100
NVIDIA's first data-center GPU built on its Volta architecture, announced in May 2017. It added Tensor Cores, dedicated matrix-multiply units; OpenAI later trained its GPT-3 models on V100s.
2016
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Sep 2016
NVIDIA Tesla P40
The NVIDIA Tesla P40 is a data-center GPU accelerator described in a September 2016 NVIDIA datasheet. Built on the Pascal architecture and aimed at deep learning inference, it pairs 24 GB of memory with 47 TOPS of INT8 throughput in a 250 W PCIe card.
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Apr 5, 2016
NVIDIA DGX-1
NVIDIA's DGX-1, unveiled in April 2016, packed eight Tesla P100 GPUs into a single chassis and was billed as the world's first deep learning supercomputer, turning accelerator count into one purchasable machine.
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Apr 5, 2016
NVIDIA Tesla P100
The Tesla P100, announced by NVIDIA in April 2016, was the first data-center GPU on the Pascal architecture, and the first to combine stacked HBM2 memory, half-precision math aimed at deep learning and the NVLink interconnect.
2014
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Nov 2014
NVIDIA Tesla K80
NVIDIA's Tesla K80 is a dual-GPU data-center accelerator announced in November 2014, putting two GK210 chips, 24 GB of memory and up to 8.74 teraflops of single-precision performance on one 300 W board.
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MetaX Xicloud C600
The Xicloud C600 is a MetaX data-center GPU built on the company's own GPGPU architecture, offering very large ECC-protected memory, MetaXLink scaling up to 128-GPU supernodes, a 1,000 W OAM 2.0 module, and air or liquid cooling.
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Tenstorrent Blackhole
Blackhole is Tenstorrent's AI accelerator chip; Galaxy Blackhole is a server holding 32 of them, rated at 23 PFLOPS of block FP8, with Ethernet links wiring chips and clusters together.
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SambaNova SN40L
SambaNova SN40L is an AI chip that SambaNova calls a Reconfigurable Dataflow Unit, pairing dataflow-style parallel execution with a three-tier memory system spanning on-chip SRAM, co-packaged HBM and DDR DRAM.
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Groq LPU (GroqChip)
GroqChip is Groq's AI processor, built for fully deterministic execution with no run-to-run variation. It pairs a 14-nanometer die with 230 MB of on-die SRAM, up to 750 INT8 TOPS and RealScale chip-to-chip links, and ships both as a chip and on the PCIe GroqCard.
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Cerebras Wafer-Scale Engine 2
Cerebras's second-generation wafer-scale chip, presented as the largest AI processor ever made: 2.6 trillion transistors, 850,000 cores and 40 GB of on-wafer memory on a single wafer built on a 7-nanometer process.
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NVIDIA DGX Spark
NVIDIA's DGX Spark is a desktop-sized AI computer built on the GB10 Grace Blackwell Superchip, pairing a 20-core Arm CPU with a Blackwell GPU and up to 128 GB of unified memory for running large models locally.
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NVIDIA A30
A data-center GPU on NVIDIA's Ampere architecture, aimed at AI inference and mainstream enterprise workloads, with 24 GB of HBM2 memory, a 165 W power ceiling and the ability to split into as many as four MIG instances.
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NVIDIA A10
The NVIDIA A10 is a data-center GPU built on the Ampere architecture that combines graphics, video and AI inference in a single-slot PCIe card with 24 GB of memory, aimed at mainstream enterprise servers.
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NVIDIA Tesla T4
The NVIDIA Tesla T4 is a 70-watt, single-slot GPU built on the Turing architecture and aimed at AI inference, pairing Tensor Cores with dedicated video transcoding engines in a card that slots into ordinary servers.