Cambricon MLU 690 enters mass production

Background

A cloud training chip is the accelerator that sits in a data center and carries most of the arithmetic when a large model is being trained. Such chips are judged on several axes at once: how much math they can do per second, how much memory they can reach and how fast, how quickly they can exchange data with other chips, and whether they can be built and shipped in volume. Cambricon sells its cloud parts under the MLU name, and the MLU 690 is the company's next flagship chip aimed at training^[1].

Mass production and specifications

The MLU 690 entered mass production in early 2026^[1]. It is built as a dual-die package: two silicon dies sit inside one package connected by an in-package link, a way to add compute and memory beyond what a single die can hold at reasonable cost. Cambricon lists more than 700 TFLOPS of FP16 compute and 196 GB of HBM3 memory for the part^[1].

Two pieces of jargon are worth unpacking. FP16 is a half-precision floating-point format widely used in training and inference; each number takes fewer bits than in FP32, so the same area and power budget buys more throughput, at some cost in numerical range and precision. HBM3 is stacked high-bandwidth memory: layers of DRAM stacked vertically and placed close to the compute die, which widens the path between memory and arithmetic units and pushes back the point at which feeding the chip, not computing on it, becomes the bottleneck.

Cambricon says measured interconnect bandwidth on the MLU 690 exceeds 890 Gbps^[1]. Interconnect is not a secondary number in training. Training jobs are usually split across many chips that must repeatedly exchange gradients and activations, so the links between chips can limit a whole cluster just as readily as the math units do.

Production before the ramp

In 2025 the company produced 127,700 AI chips and boards and shipped 117,400 of them^[1]. Output therefore ran ahead of shipments, leaving a gap of roughly ten thousand units that was not counted as shipped in that period. The MLU 690 ramp followed this stretch of production.

Reception and quarterly results

21st Century Business Herald described the launch as filling out Cambricon's high-end compute capability^[1], framing the chip as the top of the company's product range rather than an addition at its edges.

The commercial picture around the launch was strong. In the first quarter of 2026 Cambricon reported revenue of 2.885 billion yuan, up 159.56% year on year, and net profit of 1.013 billion yuan, up 185.04%^[1]. Those are company-wide figures covering the whole business, not figures for the MLU 690 on its own.

What the numbers cover, and what they do not

Read together, the disclosed specifications place the MLU 690 on three of the axes that matter for training hardware: compute in FP16, memory capacity in HBM3, and measured interconnect bandwidth^[1]. Each addresses a different constraint. Compute sets the ceiling on how much arithmetic happens per second; memory capacity decides whether a model or a large batch fits on one device without being split; interconnect decides how efficiently work can be spread over many devices.

What the published numbers do not settle is real training throughput, which also depends on cluster size, how a job is parallelized, the maturity of the software stack, and how reliably parts can be supplied in volume. Peak figures and measured link rates are starting points for that question rather than answers to it.